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Lowest-Power, Smallest-Packages, Low-Density FPGAs


SmartFusion® System-on-Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, Arm® Cortex®-M3 processor, and programmable analog circuitry, Offering the benefits of full customization and IP protection while still being easy to use. Based on a proprietary Flash process, SmartFusion SoC FPGAs are excellent for hardware and embedded designers who need a true SoC solution that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.

Key Features


Microcontroller Subsystem (MSS)

  • Hardware industry-standard 100 MHz, 32-bit Arm® Cortex®-M3 CPU
  • Multi-layer AHB communication matrix with up to 16 Gbps throughput
  • 10/100 Ethernet MAC with RMII interface
  • Two of each: SPI, I2C, UART, 32-bit timers
  • Up to 512 KB Flash and 64 KB of SRAM
  • External Memory Controller (EMC)
  • 8-channel DMA controller
  • Up to 41 MSS I/Os with Schmitt trigger inputs
  • 25 I/Os can be used as FPGA I/Os

FPGA Fabric

  • Based on our proven ProASIC® 3 FPGA architecture
  • 200,000 to 500,000 system gates with 350 MHz system performance
  • Embedded SRAMs and FIFOs
  • Variable aspect ratio 4,608-bit SRAM blocks
  • x1, x2, x4, x9 and x18 organizations
  • True dual-port SRAM (including x18)
  • Up to 128 FPGA I/Os supporting LVDS, PCI, PCI-X and LVTTL/LVCMOS standards

Programmable Analog

  • High-performance analog signal conditioning blocks (SCB) with voltage, current and temperature monitors
  • Analog Compute Engine (ACE) offloads CPU from analog initialization and processing of Analog-to-Digital Conversion (ADC), Digital-to-Analog Conversion (DAC) and SCBs
  • Integrated ADCs and DACs with 1% accuracy
  • 12-/10-/8-bit mode ADCs with 500/550/600 Ksps sampling rate
  • Up to ten 15 ns high-speed comparators
  • Up to 32 analog inputs and three outputs

Product Table


Features

A2F200

A2F500

FPGA Fabric

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

System Gates

200,000

500,000

Equivalent LEs

2K

6K

Tiles (D-Flip-Flops)

4,608

11,520

RAM Blocks (4,608 bits)

8

24

 

A2F200

A2F500

Microcontroller Subsystem (MSS)

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

Flash (Kbytes)

256

512

SRAM (Kbytes)

64

64

Arm® Cortex®-M3 Processor with MPU

Yes

Yes

10/100 Ethernet MAC

Yes

Yes

External Memory
Controller (EMC)

26- bit address/16- bit data

26- bit address/16- bit data

DMA

8 Ch

8 Ch

I2C

2

2

SPI

1

2

1

2

16550 UART

2

2

32-Bit Timer

2

2

PLL

1

1

2

1

2

32 KHz Low-Power
Oscillator

1

1

100 MHz On-Chip RC
Oscillator

1

1

Main Oscillator (32 kHz to
20 MHz)

1

1

 

A2F200

A2F500

Programmable Analog

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

ADCs (8-/10-/12-bit SAR)

2

2

3

DACs (8-/16-/24-bit sigma-delta)

2

2

3

Signal Conditioning Blocks
(SCBs)

4

4

5

Comparators1

8

8

10

Current Monitors1

4

4

5

Temperature Monitors1

4

4

5

Bipolar High Voltage
Monitors1

8

8

10

Temperature Grade

C, I

C, I, M

Notes:

  1. These functions share I/O pins and may not all be available at the same time. See the "Analog Front-End Overview" section in the SmartFusion FPGA Analog UG for details.

Packaging and I/Os


Device

A2F2002

A2F5002

Package

PQ208

CS288

FG256

FG484

PQ208

CS288

FG256

FG484

Direct Analog Inputs

8

8

8

8

8

8

8

12

Shared Analog Inputs

16

16

16

16

16

16

16

20

Total Analog Inputs

24

24

24

24

24

24

24

32

Total Analog Outputs

1

2

2

2

1

2

2

3

MSS I/Os3,4

22

31

25

41

22

31

25

41

FPGA I/Os

66

78

66

94

666

78

66

128

Total I/Os

113

135

117

161

113

135

117

204

Notes:

  1. There are no LVTTL-capable direct inputs available on A2F060 devices
  2. These pins are shared between direct analog inputs to the ADCs and voltage/current/temperature monitors.
  3. Sixteen MSS I/Os are multiplexed and can be used as FPGA I/Os, if not needed for MSS. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5/1.8/2.5, 3.3V) standards.
  4. Nine MSS I/Os are primarily for 10/100 Ethernet MAC and are also multiplexed and can be used as FPGA I/Os if Ethernet MAC is not used in a design. These I/Os support Schmitt triggers and support only LVTTL and LVCMOS (1.5/1.8/2.5, 3.3V standards.
  5. 10/100 Ethernet MAC is not available on A2F060.
  6. EMC is not available on the A2F500 PQ208 and A2F060 TQ144 package

Documentation


Search Documentation
Showing for
Document Category Title Date
User Guide
SmartDesign MSS Fabric Interface Configuration
09 Aug 2012
User Guide
SmartDesign MSS Clock Configuration
29 Jun 2010
User Guide
SmartDesign MSS ACE Simulation
29 Jun 2010
User Guide
SmartDesign MSS AHB Matrix Configuration
12 Jun 2024
User Guide
SmartDesign MSS Watchdog Configuration
29 Jun 2010
User Guide
SmartDesign MSS Timer Configuration
10 Nov 2010
User Guide
SmartFusion MSS Reset Management Configuration
01 Oct 2010
User Guide
SmartDesign MSS UART Configuration
29 Jun 2010
User Guide
SmartDesign MSS Peripheral DMA Configuration
29 Jun 2010
User Guide
SmartDesign MSS SPI Configuration
29 Jun 2010
User Guide
SmartDesign MSS Real Time Counter (RTC) Configuration
10 Nov 2010
User Guide
SmartDesign MSS I/O Editor
02 May 2011
User Guide
SmartDesign MSS GPIO Configuration
22 May 2013
User Guide
SmartDesign MSS Embedded Nonvolatile Memory (eNVM) Configuration
22 May 2013
User Guide
SmartDesign MSS Interrupt Management
29 Jun 2010
User Guide
SmartDesign MSS MSS I/O Configuration
29 Jun 2010
User Guide
SmartDesign MSS How to Create a MSS and Fabric AMBA AHBLite Design (MSS Master Mode)
10 Nov 2010
User Guide
SmartDesign MSS I2C Configuration
29 Jun 2010
User Guide
SmartDesign MSS External Memory Controller (EMC) Configuration
01 Oct 2010
User Guide
SmartDesign MSS Firmware
02 May 2011
User Guide
SmartDesign MSS How to Create a MSS and Fabric AMBA AHBLite/APB3 Design (MSS Master Mode)
10 Nov 2010
Supporting Collateral
Linux on Microsemi SmartFusion
08 Mar 2011
User Guide
SmartFusion2/IGLOO2 FPGA Timing Constraints (Classic Constraint Flow) User’s Guide
22 Jul 2016
User Guide
SmartDesign MSS Ethernet MAC Configuration
22 May 2013
User Guide
SmartDesign MSS Configurator Overview
22 May 2013
User Guide
SmartDesign MSS How to Create a MSS and Fabric AMBA APB3 Design (MSS Master Mode)
10 Jul 2013
User Guide
SmartDesign MSS Embedded FlashROM (eFROM) Configuration
12 Jun 2024
Data Sheets
Using UART with a SmartFusion cSoC – Libero SoC and SoftConsole Flow Tutorial
13 Feb 2024
Supporting Collateral
TU0777: Designing SmartFusion with Keil Tutorial
01 Mar 2010
Tutorials
SmartFusion cSoC: Building Executable Image in Release Mode and Loading into eNVM Tutorial
20 Dec 2010
Application Notes
Displaying POT Level with LEDs: Libero SoC and µVision4 IDE Flow Tutorial for SmartFusion SoC FPGA
13 Jul 2010
Application Notes
SmartFusion cSoC Webserver Demo Using uIP and FreeRTOS User Guide
04 Apr 2010
Application Notes
Displaying POT Level with LEDs: Libero SoC and SoftConsole Flow Tutorial for a SmartFusion SoC FPGA
02 Apr 2024
Application Notes
Displaying POT Level with LEDs: Libero SoC and IAR Embedded Workbench Flow Tutorial for SmartFusion SoC FPGA
02 Apr 2024
Application Notes
Displaying POT Values over UART SoftConsole Standalone Flow Tutorial for SmartFusion SoC FPGA
01 Mar 2010
Application Notes
Using UART with a SmartFusion SoC FPGA: Libero SoC and SoftConsole Flow Tutorial
02 Apr 2024
Application Notes
Using Keil uVision and Microsemi SmartFusion SoC FPGAs
02 Apr 2024
Application Notes
Using UART with SmartFusion SoC FPGA: SoftConsole Standalone Flow Tutorial
01 Mar 2010
User Guide
UG0250: SmartFusion Microcontroller Subsystem User Guide
01 Mar 2010
User Guide
SmartFusion Programmable Analog Users Guide
12 May 2020
User Guide
SmartFusion Bus Functional Model User
01 Aug 2012
User Guide
SmartFusion SoC FPGA Fabric User's Guide
01 Mar 2010
User Guide
SmartDesign MSS Canvas
05 Apr 2012
User Guide
SmartDesign MSS ARM Cortex-M3 Configuration
22 May 2013
User Guide
SmartFusion Dedicated Fabric Clock Conditioning Circuit with PLL Integration
22 May 2013
User Guide
SmartDesign MSS Running the MSS Configurator in Your Software Tool Chain
29 Jun 2010
User Guide
SmartDesign MSS Simulation
02 Mar 2012
User Guide
SmartFusion Evaluation Kit Quickstart Card
01 Mar 2010
User Guide
Mixed Signal Daughter Card User's Guide
27 Oct 2010
Application Notes
SmartFusion Modbus TCP Demo Using lwIP and FreeRTOS User's Guide
16 Apr 2024
User Guide
SmartFusion cSoC_Display_Solution_User's_Guide
12 Jun 2024
User Guide
QG0204: SmartFusion Development Kit Quickstart Guide
01 Mar 2010
User Guide
UG0209: SmartFusion Evaluation Kit User Guide
01 Mar 2010
User Guide
UG0208: SmartFusion Development Kit User Guide
01 Mar 2010
SmartFusion Design Resources
06 May 2022
Data Sheets
DC-DC Regulator Guide for Microsemi FPGAs and SOC FPGAs
23 Sep 2022
Board Design Files
A2F060M3E-CS288 BSDL
07 Aug 2011
Board Design Files
A2F060M3E-FG256 BSDL
07 Aug 2011
Board Design Files
A2F060M3E-TQ144 BSDL
01 Mar 2012
Board Design Files
A2F200M3F-CS288 BSDL
03 Aug 2010
Board Design Files
A2F200M3F-FG256 BSDL
12 May 2010
Board Design Files
A2F200M3F-FG484 BSDL
12 May 2010
Board Design Files
A2F200M3F-PQ208 BSDL
18 Apr 2011
Board Design Files
A2F500M3G-CS288 BSDL
03 Aug 2010
Board Design Files
A2F500M3G-FG256 BSDL
03 Aug 2010
Board Design Files
A2F500M3G-FG484 BSDL
03 Aug 2010
Board Design Files
A2F500M3G-PQ208 BSDL
18 Apr 2011
Data Sheets
SmartFusion Customizable System-on-Chip (cSoC)
30 Aug 2023
Reference Manual
New/Old OLED Display Drivers and Datasheets
13 Nov 2012
Data Sheets
Military Grade SmartFusion Customizable System-on-Chip (cSoC)
29 Nov 2023
Supporting Collateral
ER0023: SmartFusion Devices Errata
17 Jul 2014
Errata
Functional Safety Package Errata
05 Oct 2023
Board Design Files
A2F200/A2F500 Commercial IBIS Models
01 Mar 2010
Board Design Files
A2F200/A2F500 Industrial IBIS Models
01 Mar 2010
Brochures
SmartFusion SoC Brochure
07 Jan 2020
Military Grade SmartFusion Customizable System-on-Chip (cSoC)
31 Jan 2022
Product Brief
SmartFusion Product Brief
07 Jan 2013
Driving Higher PV Inverter Efficiencies through Customizable System on Chips
02 Feb 2022
Supporting Collateral
System Management Using a Mixed-Signal FPGA White Paper
17 Dec 2006
Application Notes
SmartFusion SoC FPGA: DC Fan Control Using PWM App Note
16 Aug 2011
Application Notes
SmartFusion SoC FPGA: Mixed Signal Power Manager: Customizing the MPM Reference Design App Note
21 Aug 2012
Application Notes
SmartFusion SoC FPGA: Implementation of FLAC Player Using Hardware and Software Partitioning App Note
29 Aug 2011
Application Notes
AC367: SmartFusion Design Migration Considerations from A2F200 060 (Virtual 060) to A2F060 (Real 060) App Note
31 Mar 2011
Application Notes
SmartFusion cSoC: Basic Bootloader and Field Upgrade eNVM Through IAP Interface App Not
02 Aug 2011
Application Notes
AC362: SmartFusion cSoC-Programming FPGA Fabric and eNVM Using In-Application Programming Interface
17 Feb 2025
Application Notes
AC359: SmartFusion Board Design Guidelines App Note
17 Jul 2014
Application Notes
SmartFusion cSoC: Running Webserver,TFTP on lwIP TCP/IP Stack App Note
07 Feb 2011
Application Notes
SmartFusion SoC FPGA: ACE Sequencing Control Using Fabric and MSS App Note
13 Mar 2011
Application Notes
SmartFusion SoC FPGA: Achieving Maximum Throughput From FPGA Master to MSS Peripherals App Note
11 Jan 2011
Application Notes
AC361: SmartFusion: FPGA Fabric Synthesis Guidelines App Note
23 Jan 2011
Application Notes
SmartFusion SoC FPGA : Implementation of FatFs on Serial Flash App Note
29 Nov 2010
Application Notes
SmartFusion SoC FPGA : USB Interface Using Fabric
15 Sep 2010
Application Notes
SmartFusion SoC FPGA: Interfacing with OLED using I2C App Note
18 Jul 2010
Application Notes
Interrupting SmartFusion MSS Using FABINT App Note
23 May 2010
Application Notes
SmartFusion cSoC : Loading and Booting from External Memories App Note
16 Jun 2010
Application Notes
AC338: Interrupting SmartFusion MSS Using GPIO and FABINT App Note
09 May 2010
Application Notes
AC348: SmartFusion SoC FPGA: Accessing External Memories Using the External Memory Controller App Note
18 Jul 2010
Application Notes
AC345: SmartFusion SoC FPGA: Accessing EEPROM Using I2C App Note
21 Jul 2010
Application Notes
AC335: Building an APB3 Core for SmartFusion SoC FPGA App Note
17 Mar 2010
User Guide
SmartDesign MSS Ethernet MAC Configuration
29 Jun 2010
Supporting Collateral
Intelligent Power Management with MPM for SmartFusion
02 Aug 2010
Application Notes
Connecting User Logic to the SmartFusion Microcontroller Subsystem App Note
01 Mar 2010
Application Notes
Accessing Serial Flash Memory Using SPI Interface App Note
03 Jun 2010
Application Notes
Designing a High-Speed Timer in SmartFusion Fabric App Note
15 Mar 2010
Application Notes
SmartFusion SoC FPGA: Waveform Generation Using ACE DAC
07 Sep 2010
Application Notes
SmartFusion SoC FPGA: Using ACE with PDMA
08 Sep 2010
Application Notes
SmartFusion SoC FPGA: Using ACE with PDMA
20 Sep 2010
Application Notes
SmartFusion SoC FPGA: System Power Optimization Using Low Power Modes App Note
31 Jan 2011
Application Notes
AC375: SmartFusion SoC FPGA: Enhancing Analog Front-End Performance Using Oversampling and Fourth- Order Sigma-Delta Modulator App Note
11 Sep 2011
Application Notes
SmartFusion SoC FPGA: Multi-Channel FFT Co-Processor Using FPGA Fabric App note
20 Feb 2012
Supporting Collateral
Silicon Labs CP210x VCP USB-UART Driver Files v6,5
15 Mar 2009
Application Notes
AC379: Advanced Static Timing Analysis Using SmartTime App Note
30 Oct 2011
Application Notes
Internal Power-on Reset and Post Programming Reset Circuit for Flash-Based FPGAs App Note
26 Jan 2012
Application Notes
AC374: Simultaneous Read-Write Operations in Dual-Port SRAM for Flash-Based cSoCs and FPGAs App Note
05 Sep 2011
Application Notes
AC382: Zeroization App note
23 Aug 2022
Application Notes
Bidirectional Level Shifter App Note
15 Sep 2010
Application Notes
Source-Synchronous Clock Designs: Timing Constraints and Analysis App Note
02 Aug 2011
Supporting Collateral
Designing SmartFusion with IAR Systems
01 Mar 2010
Application Notes
Microsemi SmartFusion Modbus Reference Design User
12 May 2011
Application Notes
SmartFusion cSoC Display Solution Using Open GL SC Graphics Library and Customizable Display Controller in FPGA Fabric Demo User
13 Feb 2012
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08 Mar 2011
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20 Dec 2010
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Application Notes


Title
Date
SmartFusion SoC FPGA: DC Fan Control Using PWM App Note 16 Aug 2011 Link
SmartFusion SoC FPGA: Mixed Signal Power Manager: Customizing the MPM Reference Design App Note 21 Aug 2012 Link
SmartFusion SoC FPGA: Implementation of FLAC Player Using Hardware and Software Partitioning App Note 29 Aug 2011 Link
AC367: SmartFusion Design Migration Considerations from A2F200 060 (Virtual 060) to A2F060 (Real 060) App Note 31 Mar 2011
SmartFusion cSoC: Basic Bootloader and Field Upgrade eNVM Through IAP Interface App Not 02 Aug 2011 Link
AC362: SmartFusion cSoC-Programming FPGA Fabric and eNVM Using In-Application Programming Interface 17 Feb 2025 Link
AC359: SmartFusion Board Design Guidelines App Note 17 Jul 2014
SmartFusion cSoC: Running Webserver,TFTP on lwIP TCP/IP Stack App Note 07 Feb 2011 Link
SmartFusion SoC FPGA: ACE Sequencing Control Using Fabric and MSS App Note 13 Mar 2011 Link
SmartFusion SoC FPGA: Achieving Maximum Throughput From FPGA Master to MSS Peripherals App Note 11 Jan 2011 Link
AC361: SmartFusion: FPGA Fabric Synthesis Guidelines App Note 23 Jan 2011
SmartFusion SoC FPGA : Implementation of FatFs on Serial Flash App Note 29 Nov 2010 Link
SmartFusion SoC FPGA : USB Interface Using Fabric 15 Sep 2010 Link
SmartFusion SoC FPGA: Interfacing with OLED using I2C App Note 18 Jul 2010 Link
Interrupting SmartFusion MSS Using FABINT App Note 23 May 2010 Link
SmartFusion cSoC : Loading and Booting from External Memories App Note 16 Jun 2010 Link
AC338: Interrupting SmartFusion MSS Using GPIO and FABINT App Note 09 May 2010 Link
AC348: SmartFusion SoC FPGA: Accessing External Memories Using the External Memory Controller App Note 18 Jul 2010 Link
AC345: SmartFusion SoC FPGA: Accessing EEPROM Using I2C App Note 21 Jul 2010 Link
AC335: Building an APB3 Core for SmartFusion SoC FPGA App Note 17 Mar 2010 Link
SmartDesign MSS Ethernet MAC Configuration 29 Jun 2010
Intelligent Power Management with MPM for SmartFusion 02 Aug 2010
Connecting User Logic to the SmartFusion Microcontroller Subsystem App Note 01 Mar 2010 Link
Accessing Serial Flash Memory Using SPI Interface App Note 03 Jun 2010 Link
Designing a High-Speed Timer in SmartFusion Fabric App Note 15 Mar 2010 Link
SmartFusion SoC FPGA: Waveform Generation Using ACE DAC 07 Sep 2010 Link
SmartFusion SoC FPGA: Using ACE with PDMA 08 Sep 2010 Link
SmartFusion SoC FPGA: Using ACE with PDMA 20 Sep 2010 Link
SmartFusion SoC FPGA: System Power Optimization Using Low Power Modes App Note 31 Jan 2011 Link
AC375: SmartFusion SoC FPGA: Enhancing Analog Front-End Performance Using Oversampling and Fourth- Order Sigma-Delta Modulator App Note 11 Sep 2011 Link
SmartFusion SoC FPGA: Multi-Channel FFT Co-Processor Using FPGA Fabric App note 20 Feb 2012 Link
Silicon Labs CP210x VCP USB-UART Driver Files v6,5 15 Mar 2009
AC379: Advanced Static Timing Analysis Using SmartTime App Note 30 Oct 2011
Internal Power-on Reset and Post Programming Reset Circuit for Flash-Based FPGAs App Note 26 Jan 2012 Link
AC374: Simultaneous Read-Write Operations in Dual-Port SRAM for Flash-Based cSoCs and FPGAs App Note 05 Sep 2011
AC382: Zeroization App note 23 Aug 2022 Link
Bidirectional Level Shifter App Note 15 Sep 2010 Link
Source-Synchronous Clock Designs: Timing Constraints and Analysis App Note 02 Aug 2011 Link

Demo Guides


User Guides


Tutorials


Configuration Guides


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Title
Date
SmartDesign MSS Fabric Interface Configuration 09 Aug 2012
SmartDesign MSS Clock Configuration 29 Jun 2010
SmartDesign MSS ACE Simulation 29 Jun 2010
SmartDesign MSS AHB Matrix Configuration 12 Jun 2024
SmartDesign MSS Watchdog Configuration 29 Jun 2010
SmartDesign MSS Timer Configuration 10 Nov 2010
SmartFusion MSS Reset Management Configuration 01 Oct 2010
SmartDesign MSS UART Configuration 29 Jun 2010
SmartDesign MSS Peripheral DMA Configuration 29 Jun 2010
SmartDesign MSS SPI Configuration 29 Jun 2010
SmartDesign MSS Real Time Counter (RTC) Configuration 10 Nov 2010
SmartDesign MSS I/O Editor 02 May 2011
SmartDesign MSS GPIO Configuration 22 May 2013
SmartDesign MSS Embedded Nonvolatile Memory (eNVM) Configuration 22 May 2013
SmartDesign MSS Interrupt Management 29 Jun 2010
SmartDesign MSS MSS I/O Configuration 29 Jun 2010
SmartDesign MSS How to Create a MSS and Fabric AMBA AHBLite Design (MSS Master Mode) 10 Nov 2010
SmartDesign MSS I2C Configuration 29 Jun 2010
SmartDesign MSS External Memory Controller (EMC) Configuration 01 Oct 2010
SmartDesign MSS Firmware 02 May 2011
SmartDesign MSS How to Create a MSS and Fabric AMBA AHBLite/APB3 Design (MSS Master Mode) 10 Nov 2010
Linux on Microsemi SmartFusion 08 Mar 2011
SmartFusion2/IGLOO2 FPGA Timing Constraints (Classic Constraint Flow) User’s Guide 22 Jul 2016
SmartDesign MSS Ethernet MAC Configuration 22 May 2013
SmartDesign MSS Configurator Overview 22 May 2013
SmartDesign MSS How to Create a MSS and Fabric AMBA APB3 Design (MSS Master Mode) 10 Jul 2013
SmartDesign MSS Embedded FlashROM (eFROM) Configuration 12 Jun 2024

SmartFusion System-on-Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, Arm Cortex-M3 processor and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. Based on a proprietary Flash process, SmartFusion SoC FPGAs are excellent for hardware and embedded designers who need a true SoC solution that gives more flexibility than traditional fixed-function microcontrollers without the excessive cost of soft processor cores on traditional FPGAs.

Kits and Hardware


SmartFusion FPGA Kits


SmartFusion Development Kit

This full-featured development kit enables you to evaluate the world's only FPGA with a hard Arm Cortex-M3 core and programmable analog. The device contains on-chip Flash and SRAM memory.  Additional off-chip memory is available on the board. The board can communicate via Ethernet and HyperTerminal. 

SmartFusion Evaluation Kit

This kit offers a simple, low-cost way to try the world's only FPGA with a hard Arm Cortex-M3 core and programmable analog.

Mixed-Signal Daughter Card

This daughter card is designed for connection to the mixed- signal header on the SmartFusion Evaluation Kit (A2F-EVAL-KIT-2) or SmartFusion Development Kit (A2F500-DEV-KIT-2). The board includes test points for the signals driven by the mixedsignal header and also has a 100 mm header that can be used to wire wrap or solder signals directly.

Digital Mixed-Signal Power Manager (DMPM) Daughter Card Kit

This daughter card can be used to evaluate the functionality of our power management solutions. It  supports  up to 64 channels, mixed analog and digital Point of Load (POL) control, PMBus® support for digital POLs, and margining and trimming for analog POLs.

Programmers and Adapters


Explore Other FPGA Kits and Hardware