EVB-LAN8841 Evaluation Board | Microchip Technology

Part Number: EV19G28A

EVB-LAN8841 Evaluation Board


  • Modular EDS Card enabling PC Based (via the EVB-LAN7431-EDS PCIe to RGMII Networking adapter) or Embedded Processor based (via the SAMA5D3 EDS Board) development
  • Linux Drivers available on GitHub 
  • LAN8841 (Superset device included on this board) and LAN8840 (Smaller RGMII only device) features include:
  • EtherSynch® technology IEEE 1588v2/PTP
  • Energy-detect power-down mode for reduced power consumption when cable is not attached
  • Energy Efficient Ethernet (EEE) support with Low-Power Idle (LPI) mode and clock stoppagefor 100BASE-TX/1000BASE-T and TX amplitude reduction with 10BASE-Te option
  • Wake-On-LAN (WOL) support with robust custom-packet detection
  • Five programmable LED outputs for link, activity and speed
  • Single (3.3v) Supply Operation

Overview


The LAN8841 Ethernet Development System (EDS) Daughter card is designed to enable modular attach to host boards with the EDS interface such as EVB-LAN7431-EDS PCIe to RGMII Networking adapter to enable PC based evaluation. 

The LAN8841 is a completely integrated triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical-layer transceiver for transmission and reception of data on standard CAT-5 as well as CAT-5e and CAT-6 unshielded twisted pair (UTP) cables. The LAN8841 offers the industry-standard GMII/MII (Gigabit Media Independent Interface/Media Independent Interface) for connection to GMII/MII MACs in Gigabit Ethernet processors and switches for data transfer at 1000 Mbps or 10/100 Mbps. An optional RGMII (Reduced Gigabit Media Independent Interface) mode is also provided, allowing the device to provide additional GPIOs.

The IEEE1588-2008 PTP functions provide hardware support for the IEEE Std 1588-2008 (v2) Precision Time Protocol (PTP), allowing clock synchronization with remote Ethernet devices, packet time stamping, and time driven event generation. The device supports source or client modes for ordinary and boundary clock operations and a transparent clock per the IEEE Std 1588-2008 specification. End-to-end and peer-to-peer link delay mechanisms are supported as are one-step and two-step operations.

Package Contents

LAN8841 EDS Daughter Card

Documentation


Silicon Products

Product
Title
Product
Title
LAN8841 Gigabit Ethernet Transceiver (PHY) w/ IEEE1588 & RGMII LAN8841 Gigabit Ethernet Transceiver (PHY) w/ IEEE1588 & RGMII
LAN8840 Gigabit Ethernet Transceiver (PHY) supporting IEEE1588 w/ RGMII LAN8840 Gigabit Ethernet Transceiver (PHY) supporting IEEE1588 w/ RGMII