PIC32CX1025SG61100 | Microchip Technology

Overview

Alternate products
Compare Products (3)
  • CPU:Cortex-M4F
  • CPU Speed Max MHz (megahertz):120
  • Operation Voltage Max.(V):3.63
  • Operation Voltage Min.(V):1.71
  • Internal Oscillator: 8,16,24Mhz,32Khz,48Khz
  • Part Family:PIC32CX
  • QSPI:1
  • RAM KB (kilobyte):256
  • Secure Subsystem:Yes
  • Program Memory size (KB):1024
  • Pincount:100
  • Crypto Engine:Yes
  • TempRange Min:-40
  • TempRange Max:125
  • UART:8
  • I2C:8
  • I2S:1
Read more
    Core:
  • Arm® Cortex®-M4F CPU running at up to 120 MHz:
  • 4 KB combined instruction cache and data cache
  • 8-Zone Memory Protection Unit (MPU)
  • Floating Point Unit (FPU)
    Memories
  • 1 MB in-system self-programmable Flash with Error Correction Code (ECC)
  • 256 KB SRAM main memory with Error Correction Code (ECC)
  • Up to 4 KB of Tightly Coupled Memory (TCM)
  • 8 KB additional Backup SRAM
    Low-Power and Power Management
  • Idle, Standby, Hibernate, Backup, and Off sleep modes
  • Sleepwalking peripherals
  • Battery backup support
    Security
  • One Advanced Encryption System (AES) with 256-bit key length and up to 2 MB/s data rate
  • ECB, CBC, CFB, OFB, CTR modes of operation
  • True Random Number Generator (TRNG)
  • Public Key Cryptography Controller (PUKCC)
  • RSA, DSA
  • Elliptic Curves Cryptography (ECC) ECC GF(2n), ECCGF(p)
  • Integrity Check Module (ICM) based on Secure Hash Algorithm (SHA1, SHA224, SHA256), DMA assisted
  • Permanent protection against Chip Erase, Boot section Programming and Debug access, allowing Immutable Boot Size-configurable Immutable Boot section in Flash with Boot Read Protection, allowing secure boot support
    Hardware Security Module
  • Secure boot support: Validation of host code image and host code signature validation
  • Secure update support for host code: Secure encryption key storage and image decryption
  • X.509 Certificate storage, parsing, validation and revocation, supporting both ECC and RSA
  • High-speed SHA256, HMAC and AES-CMAC engines
  • P224, P256 and P384 Elliptic Curve – ECDSA Sign/Verify
  • ECDH support for P256 & P224 Curves
  • ECBD support for P224 Curve
  • SECP256K1 (Bitcoin/Blockchain curve) ECDSA support
  • 256-bit Brainpool Elliptic Curve support – ECDSA, ECDH
  • RSA - 2048 Sign/Verify, 3072 Verify, 1024 Encrypt/Decrypt
  • 256 bit key generation and derivation
  • 2048 bit RSA key generation and derivation
  • Elliptic Curve Diffie Hellman (ECDH/ECDHE) Key Agreement
  • NIST SP800-90 Random Number Generator (RNG)
  • Internal symmetric and asymmetric key generation
    Peripherals/Timers
  • 32-channel Event System
  • Up to Eight Configurable Serial Communication Interfaces (SERCOM),
  • Eight 16-bit Timers/Counters (TC) each configurable as 16-bit ,8-bit and 32-bit TC
  • Two 24-bit Timer/Counters for Control (TCC), with extended functions:
  • Three 16-bit Timer/Counters for Control (TCC) with extended
  • 32-bit Real Time Counter (RTC) with clock/calendar function
  • Up to 5 wake-up pins with tamper detection and debouncing filter
    Advanced Analog:
  • Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each
  • Dual 12-bit, 1 MSPS Analog-to-Digital Converter (ADC) with up to 16 channels each
  • Two Analog Comparators (AC) with Window Compare function
    Communication Interfaces:
  • One two-channel Inter-IC Sound Interface (I2S)
  • Parallel Capture Controller (PCC), up to 14 bits wide
  • Peripheral Touch Controller (PTC) with Up to 32 self-capacitance and up to 256 mutual capacitance Channels
  • Two SD/MMC Host Controller (SDHC)
  • 32-channel Direct Memory Access Controller (DMAC)
  • One Quad I/O Serial Peripheral Interface (QSPI)
  • One 10/100 Mbps Ethernet MAC with dedicated DMA
  • Two Controller Area Network (CAN) with Support for CAN 2.0A/CAN 2.0B and CAN-FD (ISO
  • One Full-Speed (12 Mbps) Universal Serial Bus (USB) 2.0 With Embedded host and device function
    Clock Management/System
  • 32.768 kHz crystal oscillator (XOSC32K) with Clock failure detection
  • Two 8 MHz to 48 MHz crystal oscillator (XOSC) with Clock failure detection
  • 32.768 kHz ultra-low-power internal oscillator (OSCULP32K)
  • Power-on Reset (POR) and Brown-out Detection (BOD)
    Debugger Development Support
  • Two-pin Serial Wire Debug (SWD) programming and debugging interface.
  • Six hardware breakpoints and four data watchpoints
Use your up or down key to switch images.

Documentation

Filter by Document Type
Search Documentation

Tools And Software

PIC32CX1025SG61100
Part Number: Quantity: Price per Unit (in USD): Total Amt:

Design Resources

Reference Designs
Code Examples

Purchase