ATSAMD21G17L | Microchip Technology

Overview

  • Part Family:SAM D21
  • CPU Type:Cortex-M0+
  • MaxSpeed (MHz):48
  • Program Memory Size (KB):128
  • SRAM (KB):16
  • Temp. Range Min.:-40
  • Temp. Range Max.:125
  • Operation Voltage Min.(V):1.62
  • Operation Voltage Max.(V):3.63
  • SPI:5
  • I2C:5
  • UART:5
  • QSPI:0
  • Crypto Engine:No
  • Internal Oscillator:32khz, 32Khz ULP, 8Mhz
  • Pin Count:48
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    Processor
  • ARM CortexM0+ CPU running at up to 48MHz
  • Single-cycle hardware multiplier
  • Micro Trace Buffer (MTB)
    Memories
  • 128KB in-system self-programmable Flash
  • 4KB RWW support
  • 16KB SRAM Memory
    System
  • Power-on reset (POR) and brownout detection (BOD)
  • Internal and external clock options with 48MHz Digital Frequency Locked Loop (DFLL48M)
  • and 48MHz to 96MHz Fractional Digital Phase Locked Loop (FDPLL96M)
  • External Interrupt Controller (EIC)
  • 16 external interrupts
  • One non-maskable interrupt
  • Two-pin Serial Wire Debug (SWD) programming, test and debugging interface
    Low Power
  • Idle and standby sleep modes
  • SleepWalking peripherals
    Peripherals
  • 12channel Direct Memory Access Controller (DMAC)
  • 12channel Event System
  • Five 16bit Timer/Counters (TC), configurable as either:
  • One 16bit TC with two compare/capture channels
  • One 8bit TC with two compare/capture channels
  • One 32bit TC with two compare/capture channels, by using two TCs
  • Four 24bit Timer/Counters for Control (TCC), with extended functions:
  • Up to four compare channels with optional complementary output
  • Generation of synchronized pulse width modulation (PWM) pattern across port pins
  • Deterministic fault protection, fast decay and configurable dead-time between complementary output
  • Dithering that increase resolution with up to 5 bit and reduce quantization error
  • 32bit Real Time Counter (RTC) with clock/calendar function
  • Watchdog Timer (WDT)
  • CRC32 generator
  • Six Serial Communication Interfaces (SERCOM), each configurable to operate as either:
  • USART with full-duplex and single-wire half-duplex configuration
  • I2C up to 3.4MHz
  • SPI
  • LIN slave
  • One 12bit, 350ksps Analog-to-Digital Converter (ADC) with up to 18 channels
  • Differential and single-ended input
  • 1/2x to 16x programmable gain stage
  • Automatic offset and gain error compensation
  • Oversampling and decimation in hardware to support 13, 14, 15or 16bit resolution
  • 10-bit, 350ksps Digital-to-Analog Converter (DAC)
  • Four Analog Comparators (AC) with window compare function
    I/O
  • 38 GPIO pins
    Packages
  • 48pin TQFP, QFN
    Operating Voltage
  • 1.62V 3.63V
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ATSAMD21G17L
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