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High-Reliability, Radiation-Tolerant, Antifuse-Based FPGAs


These radiation-tolerant FPGAs offer industry-leading advantages for designers of space flight systems. With low-power consumption, true single-chip form factor and live-at-power-up operation, RTAX™ FPGAs are the choice for space designers. From concept to final integration and flight, we provide the tools and support to help you successfully integrate your space flight application into RTAX radiation-tolerant FPGAs. For space applications that require a lower standby current, we offer RTAX FPGAs, a low-power-grade option that has half the standby current of our standard FPGAs at worst-case conditions.

RTAX-DSP FPGAs offer up to 166 user I/Os and RTAX-S/SL FPGAs offer up to 840 user I/Os for space-based applications. The RTAX FPGA product family features SEU-hardened flip-flops implemented without any user intervention and includes embedded SRAM with error correction encoding.

Embedded radiation-tolerant DSP math blocks feature 18 bit × 18 bit multiply-accumulate blocks that enable efficient implementation of DSP building blocks such as Finite Impulse Response (FIR) and Infinite Impulse Response (IIR) digital filters, Fast Fourier Transforms (FFTs) and Inverse Fourier Transforms (IFTs), Discrete Cosine Transforms (DCTs) and Reed-Solomon encoding algorithms. The RTAX-DSP FPGA family features up to 120 math blocks, each capable of operating at 125 MHz over the full military temperature range (−55 °C to 125 °C) for a total throughput of 15 billion multiply/accumulates per second (15 GMACS) without any user intervention.

Features

  • Highly reliable, nonvolatile antifuse technology
  • Up to 840 user I/Os
  • Up to 540 kbits of embedded memory with optional EDAC protection
  • Hermetically sealed packages for space applications (CQFP, CCGA/LGA)

Radiation Tolerance

  • Total dose: 300 krad (functional) and 200 krad (parametric)
  • SEU less than 1E-10 errors per bit-day (worst-case GEO)
  • SEL immune to LETTH more than 117 MeV-cm2/mg
  • SEU immune to LETTH > 37 MeV-cm2/mg

Qualification 

  • QML class Q and QML class V qualification
  • Heritage in many major programs including Sentinel-2, KOMPSAT-3, ExoMars, GOES-R, Galileo, BepiColombo, MTG, James Webb Space Telescope, GPS III, Iridium and more

Learn About Our Space FPGA Portfolio


Radiation and Reliability 

Radiation-Tolerant FPGAs

Sub-QML FPGAs

Products 


Device

RTAX250S/SL RTAX1000S/SL RTAX2000S/SL RTAX4000S/SL RTAX2000D/DL RTAX4000D/DL

Equivalent System Gates

250,000 1,000,00 2,000,000 4,000,000 2,000,000 4,000,0000

ASIC Gates

30,000 125,000 250,000 500,000 250,000 500,000

Register (R-Cells)

1,408 6,048 10,752 20,162 9,856 18,480

Combinatorial (C-Cells)

2,816 12,096 21,504 40,320 19,712 36,960

Embedded Core RAM Blocks

12 36 64 120 64 120

Embedded Core RAM Bits

54k 162k 288k 540k 288k 540k

Hardwired Clocks

4 4 4 4 4 4

Routed Clocks

4 4 4 4 4 4

I/O Banks

8 8 8 8 8 8

User I/Os (Maximum)

198 418 684 840 166 166

I/O Registers

744 1,548 2,052 2,520 2,052 2,520

Speed Grades

STD,-1 STD,-1 STD,-1 STD,-1 STD, -1 STD, -1

Screening Level

E,B,V E,B,V E,B,V E,B,V E,B,V E,B,V

CQFP Package

208,352 352 256,352 352 352 352
CCGA/LGA 624 624 624,1152 1272 - -
DSP Mathblocks - - - - 64 120

Documentation


Search Documentation
Title
Date
AC170: Prototyping RTAX-S Using Axcelerator Devices App Note 25 May 2003
AC384: DSP Design Flows For Microsemi FPGAs application note 02 Apr 2012
AC305: Implementation of the SpaceWire Clock Recovery Logic in Actel RTAX-S Devices App Note 30 Aug 2007
AC304: Simulating SEU Events in EDAC RAM App Note 30 Aug 2007 Link
AC395: Timing Analysis of RTAX-S/SL/DSP Design Using Libero IDE v9.2 27 Mar 2014
PD3068: Package Mechanical Drawings Datasheet 17 Feb 2023
AC275: Actel CCGA to FBGA Adapter Socket Instructions 07 Oct 2003 Link
AC308: Antifuse MetaReport AN 06 May 2013
AC273: Using EDAC RAM for RadTolerant RTAX-S FPGAs and Axcelerator FPGAs App Note 20 Jul 2003 Link
AC173: Differences Between RTAX-S/SL and Axcelerator App Note 25 May 2003
AC288: Using LVDS for Microsemi Axcelerator and RTAX-S/SL Devices App Note 13 Oct 2004
AC319: Using EDAC RAM for RadTolerant RTAX-S/SL FPGAs and Axcelerator FPGAs App Note 22 Jun 2006 Link
AC354: Core8051s Debugging in Axcelerator and RTAX-S Device 22 Sep 2010 Link
AC378: RTAX-S/SL/DSP Programming Guide App Note 04 Aug 2011
AC310: RTAX-S/SL Clocking Resource and Implementation App Note 16 Aug 2007
AC387: Designing Radiation-Tolerant Power-Supplies for the RTAX-S/SL/DSP FPGA App Note 18 Sep 2012
AC183: Using Global Resources in Actel's Axcelerator Family App Note 07 Aug 2003
Antifuse Programming FAQ 24 Mar 2003
AC134: Minimizing Single Event Upset Effects Using Synopsys App Note 15 Jan 2003
AC128: Design Techniques for RadHard FPGAs App Note 15 Jan 2003
AC139: Using Synplify to Design in Microsemi Radiation-Hardened FPGAs App Note 15 Jan 2003
AC379: Advanced Static Timing Analysis Using SmartTime App Note 30 Oct 2011
AC263: Simultaneous Switching Noise and Signal Integrity 19 Feb 2003
AC276: Board Level Considerations for Microsemi FPGAs App Note 15 Jan 2003
AC190: Ceramic Column Grid Array Application Note 07 Oct 2003
AC193: Ceramic Chip Carrier Land Grid (CC256) Package Handling App Note 23 Nov 2003
AC274: CQFP to FBGA Adapter Sockets App Note 18 Jan 2004 Link
AC341: Microsemi CCGA to CLGA Adapter Socket Application Note 03 Mar 2010
AC342: CQFP to CLGA Adapter Socket Application Note 03 Mar 2010
AC344: Board-Level Considerations for Power-Up and Power-Down of RTAX-S/SL FPGAs 18 May 2010
Source-Synchronous Clock Designs: Timing Constraints and Analysis App Note 02 Aug 2011 Link

IBIS Models


Title
Date
RTAX-S/SL IBIS Model (UNIX gzip) 06 Mar 2005

Note: 

RTAX-S/SL and RTAX-DSP


RTAX-S/SL radiation-tolerant FPGAs offer industry-leading advantages for designers of spaceflight systems. High performance, low power consumption, true single-chip form factor, and live-at-power-up operation all combine to make RTAX-S/SL devices the FPGAs of choice for space designers. RTAX-DSP spaceflight FPGAs add embedded radiation-tolerant, multiply-accumulate blocks to the tried-and-trusted industry standard RTAX-S/SL product family. The result is a dramatic increase in device performance and utilization when implementing arithmetic functions (such as those encountered in DSP algorithms) without sacrificing reliability or radiation tolerance. RTAX-DSP integrates complex DSP functions into a single device without any external components for code storage or multiple-chip implementations for radiation mitigation.

Notes:

  1. All parts in Column Grid Array packages are now supplied with only six sigma solder columns

Kits and Hardware


Programmers and Adapters


Silicon Sculptor 4

This is a CE-compliant production device programmer.

Silicon Sculptor Adapter Module 

Silicon sculptor adapter modules are package specific. They depend on the product family, but are independent of gate count.

In-House-Programming

An optional In-House Programming (IHP) service is available if you are purchasing our devices in large volumes. 

Explore Other FPGA Kits and Hardware