We detect you are using an unsupported browser. For the best experience, please visit the site using Chrome, Firefox, Safari, or Edge. X
Maximize Your Experience: Reap the Personalized Advantages by Completing Your Profile to Its Fullest! Update Here
Stay in the loop with the latest from Microchip! Update your profile while you are at it. Update Here
Complete your profile to access more resources.Update Here!
Item Qty
Your cart is empty.

Aurora 64B/66B


Aurora 64B/66B is a lightweight and open protocol suitable for chip-to-chip, board-to-board and backplane applications using very high-speed transceivers. Compared to the 8B/10B version of the Aurora protocol, the 64B/66B flavor addresses the highest lanes speeds. It also offers an effective bandwidth of up to 97%, instead of 80% for 8B/10B.


Features and Benefits


  • Full-Duplex and Simplex Tx/Rx Operations.
  • ALSE tested this IP up to 25.7813 Gbps per lane, but other speeds are indeed possible (depending on Transceiver's and hardware possibilities).
  • 64 bits (8 Bytes width) user datapath per lane.
  • Up to 16 transceiver lanes.
  • Framing and Streaming interface.
  • User flow control.
  • User K-Block interface.
  • Native flow control in immediate and completion mode.
  • 64b/66b encoding.
  • Additional CRC for PDU Frames.
  • Clock compensation sequence generation.
  • Per lane polarity inversion and skew compensation.
  • AXI / Avalon-ST Streaming compatible.
  • Little and Big Endian mode.
  • Provided with Hardware Reference designs, QIP files, SDC constraints, Simulation environment.

Licensing Options


For additional information, info@alse-fr.com or visit ALSE

Documentation


Title
aurora-64b-66b Link