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Overview
- Vreg Output Voltage [V]:3.3
- Vreg Output Current [mA]:85
- Flash [kB]:64
- SRAM [kB]:8
- EEPROM [kB]:2
- Hardware Touch Peripheral:None
- I2C:6
- SPI:6
- U(S)ART:6
- Operating Temperature Max [°C]:105
- Operative Voltage VS Max [V]:28
- Vreg Accuracy [%]:2
- Processor
- Arm Cortex-M0+ CPU running at up to 48 MHz
- Single-cycle hardware multiplier
- Micro trace buffer
- Memories
- 64 KB in-system self-programmable Flash
- 2 KB Read-While-Write (RWW) Flash section
- 8 KB SRAM memory
- System
- Power-on reset (POR) and brown-out detection (BOD)
- Internal and external clock options with 48 MHz digital frequency locked loop (DFLL48M)
- 48 MHz to 96 MHz fractional digital phase locked loop (FDPLL96M)
- External interrupt controller (EIC)
- 15 external interrupts
- One non-maskable interrupt
- Two-pin serial wire debug (SWD) programming, test and debugging interface
- Low power
- Idle and standby sleep modes
- SleepWalking peripherals
- Peripherals
- 8-channel direct memory access controller (DMAC)
- 12-channel event system
- Five 16-bit timer/counters (TC), configurable as either:
- One 16-bit TC with compare/capture channels
- One 8-bit TC with compare/capture channels
- One 32-bit TC with compare/capture channels, by using two TCs
- Three 16-bit timer/counters for control (TCC), with extended functions:
- Up to four compare channels with optional complementary output
- Generation of synchronized pulse width modulation (PWM) pattern across port pins
- Deterministic fault protection, fast decay and configurable dead-time between complementary output
- Dithering for enhancing resolution with up to 5-bit and reduce quantization error
- 32-bit real time counter (RTC) with clock/calendar function
- Watchdog timer (WDT)
- CRC-32 generator
- Five serial communication interfaces (SERCOM), each configurable to operate as either:
- USART with full-duplex and single-wire half-duplex configuration
- I2C up to 3.4MHz
- SPI
- One 12-bit, 350ksps analog-to-digital converter (ADC) with up to 13 channels
- Differential and single-ended input
- 1/2x to 16x programmable gain stage
- Automatic offset and gain error compensation
- Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
- 10-bit, 350ksps digital-to-analog converter (DAC)
- Two analog comparators (AC) with window compare function
- Packages
- 48-pin QFN
- Operating voltage
- 2.7V to 3.63V
- Built-in safety features
- CRC calculations on flash memory to detect errors
- Peripheral Access Controller to prevent accidental writes to configuration registers
- Two independent voltage monitors: BOD33 and Voltage check on Lin SBC
- Voltage monitoring for VS
- Power-on Reset for a controlled startup
- TXD dominant timeout timer
- Overtemperature Detection
The SAM HA0G16A-MZT-B is a low-power automotive system-in-package (SiP) product using the 32-bit Arm® Cortex® M0+ processor featuring 48 pins with 64KB of Flash, 2KB of read-while-write data flash, and 8KB of SRAM. The SAM HA0 devices operate at a maximum frequency of 48MHz and reach 2.46 Coremark/MHz. They also include a LIN system basis chip (SBC) with a fully integrated LIN transceiver designed in compliance with the LIN specifications 2.0, 2.1, 2.2, 2.2A, ISO 17987-4 and SAEJ2602-2, and a 3.3V/85mA voltage regulator. It is qualified for up to 115°C Tc.
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Tools And Software
Demo & Evaluation Boards
| Tools |
|---|
 The ATSAMHA1G16A Xplained Pro evaluation kit is ideal for evaluating andprototyping with the ATSAMHA1G16A ARM® Cortex®-M0+ based system in package. |
["developmentenvironment","Development Environment"] ,
["emulators","Emulator and Debuggers"] ,
["demoevaluationboards","Demo & Evaluation Boards"] ,
["programmerrelations","Programmers"] ,
["thirdpartytools","3rd Party Tools"] ,
["legacy","Legacy"] ,
["softwarelibraries","Library and Firmware"]
referencedesigns,Reference Designs:
codeexamples,Code Examples:
ibisboarddesignfiles,Board Design Files: