ATSAMDA1E15B | Microchip Technology
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Overview

  • Part Family:SAMDA1
  • CPU Type:Cortex-M0+
  • MaxSpeed (MHz):48
  • Program Memory Size (KB):32
  • SRAM (KB):4
  • Temp. Range Min.:-40
  • Temp. Range Max.:105
  • Operation Voltage Min.(V):2.7
  • Operation Voltage Max.(V):3.63
  • SPI:4
  • I2C:4
  • UART:4
  • QSPI:0
  • Crypto Engine:No
  • Internal Oscillator:32khz, 32Khz ULP, 8Mhz
  • Pin Count:32
Read more
  • ARM Cortex-M0+ CPU running at up to 48MHz
  • Single-cycle hardware multiplier
  • Micro trace buffer
  • 32KB in-system self-programmable Flash
  • 1KB Read-While-Write (RWW) Flash section
  • 4KB SRAM memory
  • Power-on reset (POR) and brown-out detection (BOD)
  • Internal and external clock options with 48MHdigital frequency locked loop (DFLL48M) and 48MHto 96MHz
  • fractional digital phase locked loop (FDPLL96M)
  • External interrupt controller (EIC)
  • 16 external interrupts
  • One non-maskable interrupt
  • Two-pin serial wire debug (SWD) programming, test and debugging interface
  • Idle and standby sleep modes
  • SleepWalking peripherals
  • 8-channel direct memory access controller (DMAC)
  • 12-channel event system
  • One 16-bit TC with compare/capture channels
  • One 8-bit TC with compare/capture channels
  • One 32-bit TC with compare/capture channels, by using two TCs
  • Up to four compare channels with optional complementary output
  • Generation of synchronized pulse width modulation (PWM) pattern across port pins
  • Deterministic fault protection, fast decay and configurable dead-time between complementary output
  • Dithering for enhancing resolution with up to 5-bit and reduce quantization error
  • 32-bit real time counter (RTC) with clock/calendar function
  • Watchdog timer (WDT)
  • CRC-32 generator
  • Device 2.0 and reduced-host low speed and full speed
  • Flexible end-point configuration and management with dedicated DMA channels
  • On-chip transceivers including pull-ups and serial resistors
  • Crystal-less operation in device mode
  • USART with full-duplex and single-wire half-duplex configuration
  • I2C up to 3.4MHz
  • SPI
  • LIN Client
  • One two-channel inter-IC sound (I2S) interface
  • Differential and single-ended input
  • 1/2x to 16x programmable gain stage
  • Automatic offset and gain error compensation
  • Oversampling and decimation in hardware to support 13-, 14-, 15- or 16-bit resolution
  • 10-bit, 350ksps digital-to-analog converter (DAC)
  • Two analog comparators (AC) with window compare function
  • Up to 256-channel capacitive touch and proximity sensing
  • 26 GPIO pins
  • 32-pin TQFP, QFN
  • 2.7V to 3.63V
  • –40 to +105°C
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atsamda1e15b
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