The Microchip PCI11101 is a single-chip PCIe switch with an integrated USB 3.2 Gen 2 host controller and programmable I/O. The integrated PCIe physical interfaces provide a 4-lane (4x8GT/s) upstream port and a 2-lane (2x8GT/s) downstream port. The device is targeted to address the need for higher bandwidth PCIe sub-systems within embedded applications. PCIe upstream can be delivered across a single or multiple lanes to accommodate best system architecture. The PCI11101 includes a compliant PCIe implementation from external facing physical interfaces through to switch fabric and endpoint controllers.

The PCI11101 includes a USB-IF and xHCI compliant USB 3.2 Gen 2 host controller with one USB 3.2 Gen 2 port. USB 3.2 Gen 2 10Gbps support is provided for USB Type-A, M.2 breakout, or embedded connections. Overcurrent Sense (OCS) and Port Control are provided for control of Vbus.

A programmable pin multiplexer is used to map I/O functions to package pins. This enables designers to work with either a default configuration or modify signals to best fit their application. Example signals include those associated with USB operation, through to GPIO or SMBus, which are accessed via a dedicated PCIe Endpoint Controller.

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