LAN8840 | Microchip Technology

Overview

  • Automotive:No
  • DownstreamPorts:1
  • Energy Efficient Ethernet:Yes
  • Port Speed:10/100/1000Mbps
  • Fiber Support:No
  • HP Auto MDIX:Yes
  • On-Chip Termination:Yes
  • InterfaceUpStream:RGMII
  • Internal Regulator:Yes
  • LinkMDCableDiag:Yes
  • MACsec:No
  • Supply Voltages:3.3
  • SyncE:Yes
  • Temperature Range Max:105
  • Temperature Range Min:-40
  • Digital I/O Voltage:3.3V/2.5V/1.8V
  • WakeonLAN:Yes
  • IEEE 1588 v2:Yes
Read more
  • Single-Chip 10/100/1000 Mbps Ethernet Transceiver Suitable for IEEE 802.3 Applications
  • RGMII with 3.3V/2.5V/1.8V Tolerant I/Os
  • RGMII Timing Supports On-Chip Delay According to RGMII Version 2.0, with Programming Options for External Delay and Making Adjustments and Corrections to TX and RX Timing Paths
  • Auto-Negotiation to Automatically Select the Highest Link-Up Speed (10/100/1000 Mbps) and Duplex (Half/Full)
  • On-Chip Termination Resistors for the Differential Pairs
  • On-Chip LDO Controller to Support Single 3.3V Supply Operation – Requires Only One External FET to Generate 1.1V for the Core
  • Jumbo Frame Support Up to 16 KB
  • 125 MHz Reference Clock Output
  • Energy-Detect Power-Down Mode for Reduced Power Consumption When Cable is Not Attached
  • EtherSynch® IEEE 1588v2/PTP
  • Layer 2, UDP/IPv4 and UDP/IPv6 formats
  • Tagged and non-tagged frame formats
  • One-step and two-step modes of operation
  • Energy Efficient Ethernet (EEE) Support with Low-Power Idle (LPI) Mode and Clock Stoppage for 100BASE-TX/1000BASE-T and Transmit Amplitude Reduction with 10BASE-Te Option
  • Wake-On-LAN (WOL) Support with Robust Custom-Packet Detection
  • Programmable LED Outputs for Link, Activity, and Speed
  • Baseline Wander Correction
  • LinkMD® TDR-based Cable Diagnostic to Identify Faulty Copper Cabling
  • Signal Quality Indication
  • Parametric NAND Tree Support to Detect Faults Between Chip I/Os and Board
  • Loopback Modes for Diagnostics
  • Automatic MDI/MDI-X Crossover to Detect and Correct Pair Swap at All Speeds of Operation
  • Automatic Detection and Correction of Pair Swaps, Pair Skew, and Pair Polarity
  • MDC/MDIO Management Interface for PHY Register Configuration
  • Interrupt Pin Option
  • Power-Down and Power-Saving Modes
  • Available in commercial (0°C to +70°C) and extended industrial (-40°C to +105°C) temperature ranges
  • 48-pin VQFN (7 mm × 7 mm) Package
    • Operating Voltages
    • Core (VDD, VDDAL, VDDAL_PLL): 1.1V (External FET or Regulator)
    • VDD I/O (VDDIO): 3.3V, 2.5V, or 1.8V
    • Transceiver (VDDAH): 3.3V or 2.5V
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