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Overview
- Power Options:ULTRA-LOW
- Operating Voltage Min (V):1.8
- Inputs and I/O Pins:64
- Registers:64
- Macrocells:64
- tPD Min:5ns/7ns
A high-performance, high-density complex programmable logic device (CPLD) that uses Atmel's proven electrically-erasable memory technology. With 64 logic macrocells and up to 68 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. Enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications.
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Tools And Software
Demo & Evaluation Boards
| Tools |
|---|
 The ATF15xx CPLD USB-based JTAG ISP Download Cable connects to a standard USB 2. |
| The development/programmer kit supports the ATF15xxAS/ASL/ASV/ASVL family of 3. |
["developmentenvironment","Development Environment"] ,
["emulators","Emulator and Debuggers"] ,
["demoevaluationboards","Demo & Evaluation Boards"] ,
["programmerrelations","Programmers"] ,
["thirdpartytools","3rd Party Tools"] ,
["legacy","Legacy"] ,
["softwarelibraries","Library and Firmware"]
referencedesigns,Reference Designs:
codeexamples,Code Examples:
ibisboarddesignfiles,Board Design Files: