48L640 | Microchip Technology

48L640

Status: Not Recommended for new designs

Overview

  • Battery Backup:0
  • Bus Modes:SPI
  • Density:64 Kb
  • Endurance:100000
  • Max. Clock Freq.:66 MHz
  • Operating Voltage Max (V):3.6
  • Operating Voltage Min (V):2.7
  • Page Size (Bytes):1
  • Write Protect Scheme:Software Configurable
  • Write Protected:1
  • Data Retention:100
  • Read Access Speed:
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  • 8,192 x 8 bit Serial SRAM with internal nonvolatile data backup
  • High-Speed SPI Interface: Up to 66MHz with Schmitt trigger inputs for noise suppression
  • Low-Power CMOS Technology: Active current: 5 mA (maximum); Standby current: 500 µA (maximum); Hibernate current: 3 µA (maximum)
  • Cell-Based Nonvolatile Backup mirrors SRAM array cell-for-cell and transfers all data to/from SRAM cells in parallel (all cells at same time)
  • Invisible-to-User Data Transfers: VCC level monitored inside device, SRAM automatically saved on power disrupt, and SRAM automatically restored on VCC return
  • 100,000 Backups Minimum (at 20°C)
  • 100 years retention (at 20°C)
  • Operating Voltage Range: 2.7V-3.6V
  • Temperature Range Industrial (I) -40 to 85ºC, Extended (E) -40 to 125ºC
  • 8-SOIC (150mil wide) package; 8-DFN (2x3mm) package
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48L640
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