Videos | 24LC128 | Microchip Technology

Overview

  • Density:128 Kbit
  • Endurance:1,000,000
  • Max. Clock Freq.:400 kHz
  • Operating Voltage Max (V):5.5
  • Operating Voltage Min (V):2.5
  • Page Size (Bytes):64
  • Write Protect Scheme:Full Array
  • Data Retention:200
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  • Single Supply with Operation down to 1.7V for 24AA128/24FC128 devices, 2.5V for 24LC128 devices
  • Low-Power CMOS Technology: - Write current 3 mA, typical - Standby current 100 nA, typical
  • 2-Wire Serial Interface, I2C™ Compatible
  • Cascadable up to Eight Devices
  • Schmitt Trigger Inputs for Noise Suppression
  • Output Slope Control to Eliminate Ground Bounce
  • 100 kHz and 400 kHz Clock Compatibility
  • 1 MHz Clock for FC Versions
  • Page Write Time 5 ms, typical
  • Self-Timed Erase/Write Cycle
  • 64-Byte Page Write Buffer
  • Hardware Write-Protect
  • ESD Protection >4000V
  • More than 1 Million Erase/Write Cycles
  • Data Retention > 200 years
  • Factory Programming Available
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24LC128
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