Introduction to SmartHLS™ Compiler Software

This course is a 1-day training course consisting of lectures and hands-on labs to introduce the concept of using High Level Synthesis (HLS) compiler software to create hardware modules for FPGA designs. Students will use Microchip’s SmartHLS™ compiler software to create functional hardware modules using algorithms written in C++ and to optimize the modules by using the built-in features of the SmartHLS C++ Library. Hands-on lab exercises will target the PolarFire^® Splash kit; however, the kit is not necessary for the class.

This class is held at Microchip's facility located on North First Street in San Jose, CA. Students who are unable to travel to San Jose can attend remotely via the web.

• Develop an understanding of the high-level synthesis compiler software and the benefits of using the SmartHLS design flow
• Learn how to use the SmartHLS tool and its C++ Library features
• Learn how to run software/hardware co-simulation
• Learn how to integrate the SmartHLS modules into the Libero^® SoC Design Suite 

• Familiarity with the PolarFire FPGA architecture. Engineers who are not familiar with the PolarFire FPGA family should attend the Introduction to PolarFire training class.
• Familiarity with Libero SoC Design Suite. Engineers who are not familiar with Libero SoC Design Suite should attend the Introduction to Libero SoC Design Suite training class.
• Familiarity with C++
• Installation of latest vesion of the Libero SoC Design Suite with the working license file (Silver license or paid license)
• Installation of latest version of the SmartHLS compiler software

Enroll for the course by completing the registration materials. Available dates are presented on the registration page.