Introduction to Libero^® SoC Design Suite Course

Introduction to Libero SoC Design Suite is a two-day course consisting of lectures and hands-on labs. This course will teach you how to implement a PolarFire^®, IGLOO^® 2 or SmartFusion^® 2 SoC FPGA design using the Libero SoC Design Suite toolset. Each student will use Libero SoC Design Suite to take a design from conception to a functioning FPGA. The class labs will use the Microchip PolarFire FPGA Splash Kit or the PolarFire FPGA Evaluation Kit. You can implement the hands-on labs using VHDL or Verilog.

This class is held at Microchip's facility located on North First Street in San Jose, CA. Students who are unable to travel to San Jose can attend remotely via the web.

• Create projects with Libero SoC Design Suite
• Facilitate HDL entry using the Libero SoC Design Suite HDL Editor
• Use PolarFire FPGA core generators and SmartDesign
• Generate and simulate testbenches using the ModelSim ME Pro Simulator
• Use Libero SoC Design Suite Enhanced Constraint Flow
• Synthesize with Synplify Pro ME
• Use the I/O Editor to make pin assignments and set I/O attributes
• Floorplan with ChipPlanner
• Create design layouts (place and route)
• Undergo static timing analysis with SmartTime and power analysis with SmartPower
• Generate back-annotated timing files and programming files
• Program with FPGAs
• Debug with SmartDebug and Identify ME

• Experience with PCs and the Windows® operating system

Enroll for the course by completing the registration materials. Available dates are presented on the registration page.