Introduction to High-Speed I/Os of PolarFire^® FPGAs Course

This course is a one-day training course that builds on the concepts introduced in the Introduction to PolarFire FPGAs training class. This class focuses on using the I/Os of PolarFire FPGAs to implement high-speed serial interfaces and source-synchronous designs. We will facilitate hands-on lab exercises using the PolarFire FPGA Evaluation Kit to provide practical applications of the material presented.

This class is held at Microchip's facility located on North First Street in San Jose, CA. Students who are unable to travel to San Jose can attend remotely via the web.

• Develop an understanding of the I/O features of PolarFire FPGAs that support serial interfaces
• Learn how to use the I/O configurators to implement source-synchronous interfaces

• Familiarity with the FPGA design flow and microprocessor (MPU) code development
• Familiarity with the PolarFire FPGA architecture
• Engineers who are not familiar with the PolarFire FPGA family should attend the Introduction to PolarFire FPGAs training class
• Familiarity with source-synchronous designs
• Familiarity with the Libero^® SoC Design Suite toolset

Enroll for the course by completing the registration materials. Available dates are presented on the registration page.