Part Number: PCIE-ROOTPORT-AD
PCIe Root Port Adapter
Key Features:
The PCIESS is a hard PCI Express protocol stack embedded within every PolarFire device and includes the following important features:
- PolarFire transceivers for 2.5 and 5.0 Gbps line speeds
- Native x1, x2, and x4 lane-support PCIe block (down-configurable/downgradable)
- Root port support for up to two 32-bit or one 64-bit BAR.
- PCI express base specification 1.1- and 2.1-compliant
- Legacy PCI power management support
- 64-bit AXI master and slave interface to the FPGA fabric
- End-to-end data integrity
Overview
Microchip PolarFire® FPGAs support fully integrated PCIe Endpoint and Root Port subsystems with optimized embedded controller blocks that use the physical layer interface (PHY) of the transceiver. Each PolarFire device includes two embedded PCIe subsystem (PCIESS) blocks that can be configured either separately, or as a pair, using the PF_PCIE IP configurator in the Libero® System-on-Chip (SoC) PolarFire software. The PF_PCIE IP core is compliant with the PCI Express Base Specification, Revision 2.1. It implements memory-mapped advanced microcontroller bus architecture (AMBA) advanced extensible interface 4 (AXI4) access to the PCIe space, and the PCIe access to the memory-mapped AXI4 space. For more information, see UG0685: PolarFire FPGA PCI Express User Guide.
Microchip's PCIe RootPort Adapter Card is a hardware evaluation platform for evaluating and testing the PolarFire FPGA PCIe Root Port capabilities like the enumeration of an Endpoint device, low-speed and high-speed data transfers.
Applications
PCIe interface is used across many applications, including the following:
- Automotive Applications
- Datacenter infrastructure
- Enterprise infrastructure
- Defense systems
- 1 PCIe root port adapter card
- 1 12 V, 5 A AC power adapter and cord
- 1 Quickstart card