Title |
Title
Interfacing User Logic with the Microcontroller Subsystem Design Flow Tutorial
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---|---|
Name |
Name
TU0310
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Date |
Date
05/11/2021
|
Description |
Description
This tutorial describes how to interface and handle communication between user logic in the Field Programmable Gate Array (FPGA) fabric and the SmartFusion®2 Microcontroller Subsystem (MSS). It also explains the Microsemi Libero® System-on-Chip (SoC) design software tool flow for designing applications for the SmartFusion2 System-on-Chip (SoC) FPGA family of devices.
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Title | Title | Download | Date | Size |
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m2s_tu0310_df.zip 95.6 MB 11/19/2021 | m2s_tu0310_df.zip | Download | 11/19/2021 | 95.6 MB |
Title | Product | Title |
---|---|---|
M2S050
Low Density Devices with hard ARM Cortex-M3
|
M2S050 | Low Density Devices with hard ARM Cortex-M3 |
M2S060
Low Density Devices with hard ARM Cortex-M3
|
M2S060 | Low Density Devices with hard ARM Cortex-M3 |
M2S025
Low Density Devices with hard ARM Cortex-M3
|
M2S025 | Low Density Devices with hard ARM Cortex-M3 |
M2S005
Low Density Devices with hard Cortex-M3
|
M2S005 | Low Density Devices with hard Cortex-M3 |
M2S150
Low Density Devices with hard ARM Cortex-M3
|
M2S150 | Low Density Devices with hard ARM Cortex-M3 |
M2S010
Low Density Devices with hard ARM Cortex-M3
|
M2S010 | Low Density Devices with hard ARM Cortex-M3 |
M2S090
Low Density Devices with hard ARM Cortex-M3
|
M2S090 | Low Density Devices with hard ARM Cortex-M3 |