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Our 1–800 GbE PHYs are well suited for data center, enterprise and service provider switches and routers, high-availability switches requiring a hitless 2:1 mux, transponders, muxponders, Artificial Intelligence/Machine Learning (AI/ML) and Active Electrical Cable (AEC) applications. They provide retiming, gearboxing, a 2:1 hitless mux, crosspoint capabilities, optional AES-256 MACSec and IPSec encryption, port aggregation, nanosecond accuracy Precision Time Protocol (PTP) timestamping and Flexible Ethernet (FlexE) while operating over the industrial temperature range.

Our second-generation META-DX2 1.6T Ethernet PHY devices offer the industry’s most compact, secure and high-performance PHYs with 112G PAM4 long-reach SerDes. The META-DX2L and META-DX2+ devices in this family enable a wide range of pin-compatible solutions, all using a single META-DX2 Software Development Kit (SDK). The META-DX2C is an 800G AEC retimer with 112G PAM4 long-reach SerDes. The META-DX2C retimer is supported by a complete hardware and software reference design for 800G AEC development.

Meet the META-DX2C

The META-DX2C AEC retimer supports data rates of 10 GbE to 800 GbE and proprietary rates of up to 112.5 Gbps. This retimer supports 800G capacity and its long-reach 112G SerDes enables thinner and longer cables.  

Meet the META-DX2C

The META-DX2C AEC retimer supports data rates of 10 GbE to 800 GbE and proprietary rates of up to 112.5 Gbps. This retimer supports 800G capacity and its long-reach 112G SerDes enables thinner and longer cables.  

META-DX1 Ethernet PHYs  

  • Support rates from 1 GbE to 400 GbE
  • Integrate 56 Gbps PAM4 long-reach SerDes
  • Contain 48 high-speed SerDes blocks to enable up to 1.2 Tbps capacity, 800 Gbps when configured for gearboxing or 2:1 mux applications and 600 Gbps capacity with NRZ SerDes
  • Support retiming (analog and PCS), forward and reverse gearboxing, industry-leading time stamping accuracy to enable Class C/D PTP applications, hitless 2:1 multiplexing, crosspoint functionality and flexible I/O to enable connectivity to a variety of optical modules, DACs, packet processors and Ethernet switches
  • Certain devices support MACsec for encryption and Flexible Ethernet (FlexE) for data center interconnect and service provider applications

META-DX2 Ethernet PHYs

The META-DX2 family, which includes META-DX2L, META-DX2+ and META-DX2C devices, consists of multi-purpose Ethernet PHYs that:

  • Support rates from 1 GbE to 800 GbE with a range of protocol interfaces, SerDes counts and features
  • Integrate 112 Gbps PAM4 long-reach SerDes
  • Provide up to 1.6 Tbps capacity in retiming applications and up to 1.6 Tbps capacity in gearbox and 2:1 mux applications
  • Include features such as encryption, port aggregation, Class C/D PTP and hitless 2:1 multiplexing and SerDes crosspoint functionality that enable connectivity to a variety of optical modules, Direct Attach Copper (DAC) cables, packet processors and Ethernet switches
  • Offer encryption though MACsec or IPsec at full line rate
  • Support OTN, fiber channel and AI/ML rates
  • Certain devices are pin compatible and share a common SDK for leverage across a range of designs
  • Optional compact package for AEC applications

Applications of the META-DX Family


Switches/Routers 


  • Fabric cards in high-capacity modular systems
  • High-capacity line cards in modular systems
  • Fixed-form factor switches

Working/Protect Switches Using Hitless Mux 


  • Hitless switching between working and protect cards
  • SerDes that are capable of driving across backplanes or copper cables

Optical Transport Platforms for Data Center Interconnect


  • Crosspoint and gearbox functionality that enables common hardware for various optics configurations
  • Support for Ethernet, OTN and Fibre Channel rates on a per-port basis

Active Electrical Cable (AEC) Retimer


  • Retimer, gearbox or 2:1 mux in a QSFP-DD, QSFP-DD800 or OSFP800 AECs

Products


Microchip and Acacia Collaborate to Enable Optimized Terabit-Scale Data Center Interconnect Systems


The growing complexity of data centers and the surge in Data Center Interconnect (DCI) traffic drive the need to optimize the capacity of transport systems. Higher-speed Ethernet client interfaces, such as 400 GbE and 800 GbE, must be split across multiple wavelengths in some configurations to optimize the bandwidth and “fill” every wave.

Microchip and Acacia have jointly verified successful SerDes interoperation at up to 112G per lane for Ethernet and OTN clients, which reduces design validation and system qualification requirements.

The two companies’ interoperable devices, Microchip’s META-DX2+ and Acacia’s CIM 8, enable low-power, bandwidth-optimized, scalable solutions for pluggable optics in DCI and transport networks.

META-DX Family