Design Benefits:
- 60V maximum input voltage, 12.5A maximum output current, 19V output voltage
- Ultra-thin, three-level DC-DC synchronous buck converter for high-performance computing
- Small footprint size
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48V Three-Level Synchronous Buck Converter Reference Design
Third Party: EPCKey Features
The EPC9148 demonstration board is an ultra-thin, three-level DC-DC synchronous buck converter for high-performance computing systems with 60V maximum input voltage, 12.5A maximum output current, 19V output voltage, measuring only 3.5 mm component height (5 mm height total including the printed circuit board) achieving a power density of 400 W/in³. It features the high-performance dsPIC33CK Digital Signal Controller (DSC), 40 V EPC2055 and the 100 V EPC2053 and EPC2038 GaN FETs.
This reference design, uses a flying capacitor at the input side to half the input voltage, increasing the dynamic bandwidth of the converter while still using a simple, non-isolated topology. For this purpose, the classical half-bridge drive has been split into an upper and lower half-bridge sections allowing to flip the flying capacitor voltage in every switching cycle. This approach allows the usage of switching devices with lower voltage ratings which have lower on-resistance and are overall faster than their higher voltage-rating counterparts. As a result, the slightly increased losses accumulated during the charge periods of the flying capacitor are compensated by the lower commutation losses of the switch stage ending up at an equal to slightly higher total efficiency. Biasing the buck topology from the flying capacitor directly instead of the input also doubles the inductor ripple frequency and lowers the ripple current peak value. This allows using lower inductance and smaller output capacitance, which further minimizes the size and increases the power density in comparison to a conventional buck converter topology (see EPC9153 for comparison).
This driving scheme works best with low voltage Gallium-Nitride switches due to their high switching speed and very low internal capacitance. The digital control stage is key to apply the delicate switching pattern and runtime balancing of the flying capacitor voltage.
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