System Flexibility
We designed these features and peripherals to add flexibility to route/interconnect signals, to pass data and to even perform logic operations in hardware while minimizing software requirements. Additional options can optimize a system for lower-power operation and improved responsiveness to system changes.
Peripherals
Configurable Logic Block (CLB)
The CLB is a reconfigurable digital logic module that performs hardware-based digital logic independent of the CPU. It can operate in sleep, resulting in fast and predictable response times for complex processing that can occur with very low power consumption.
Direct Memory Access (DMA)
The DMA allows direct memory-to-memory mapping and multitasking behavior through concurrent operation of the DMA and the CPU. This enables a more flexible usage of eXtreme Low Power (XLP) technologies through core-independent movement of data in low-power modes and significant improvements in data throughput and latency.
Multi-Voltage I/O (MVIO)
Communicate across voltage domains safely and transparently with MVIO.
Event System (EVSYS)
The EVSYS allows you to connect the on-chip peripherals of an AVR® MCU without writing any code. This connection enables the peripherals to communicate with each other without involving the CPU in many AVR devices.
Custom Logic
We offer integrated peripherals that can function as simple logic gates, flip flops, delay elements, filters or latches. The ability to interconnect with other on-chip capabilities further enables the development of custom hardware to handle unique tasks independent of the Central Processing Unit (CPU).
Peripheral Pin Select (PPS)
PPS provides the ability to route almost any digital peripheral signal to any input/output (I/O) pin. This minimzies layout complexity while eliminating pin overlap for total optimization of peripheral resources.
Memory Features
Modern microcontrollers (MCUs) contain internal memory for executing programs and storing data. PIC® and AVR® MCUs contain advanced memory features and peripheral integrations for fast and powerful memory operations on the device.
General-Purpose Input/Output (GPIO)
As the most fundamental elements of every microcontroller (MCU), I/O pins serve as the device’s links to the outside world. Our PIC® and AVR® devices are designed to support industry-leading I/O controls and to provide innovative features that can take your products to the next level. Many advanced capabilities including weak pull-ups, high current source/sink, slew rate control, open-drain inputs and more are standard on modern PIC and AVR MCUs.
Signal Routing (SR) Port
The SR port(s) on PIC MCUs allow advanced interconnectivity between peripherals. Output signals from peripherals that normally do not interact can be passed through the virtual port for more complex designs and implementations.
Peripheral Module Disable (PMD)
PMD shuts down selected peripherals and places them into the lowest power state possible in PIC® microcontrollers (MCUs).
Multi-Voltage I/O (MVIO) on 8-bit Microcontrollers
MVIO allows a bank of I/O to run at a higher or lower voltage than the rest of the microcontroller, while still retaining all of the digital functionality of an ordinary I/O bank.
