SAMRH707 | Microchip Technology

Rad-Hard Arm® Cortex®-M7 Microcontroller

SAMRH707

Status: In Production
Rad-Hard Arm® Cortex®-M7 Microcontroller

Overview

  • CPU:arm Cortex M7
  • Operating Freq (MHz):50
  • Flash (kBytes):128
  • SRAM (kBytes):384
  • SEL - Single Event Latchup:>78 Mev.cm²/mg
  • TID - Total Ionizing Dose:100 kRad
  • Ethernet:No
  • CAN:2 (CAN/CAN-FD)
  • SpaceWire:2x 200Mbit/s - CMOS/LVDS - RMAP
  • MIL-STD-1553:Redundant BC/RT
  • ADC Channels:16
  • DAC Channels:2
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    Core
  • Arm Cortex M7 Core running up to 50 Mhz delivering up to 100 DMips
  • 16 Kbytes of ICache and 16 Kbytes of DCache with Error Code Correction (ECC)
  • Simple- and double-precision HW Floating Point Unit (FPU)
  • Memory Protection Unit (MPU) with 16 zones
  • DSP Instructions, Thumb®-2 Instruction Set
    Memory
  • 128 Kbytes embedded Flash with build in ECC (up to 2 errors correction)
  • 192 Kbytes embedded SRAM for Tightly Coupled Memory (TCM) interface or System SRAM
  • 128 Kbytes of multiport SRAM
  • Hardened External Memory Controller (HEMC), to address 8-bit wide PROM and SRAM
    System
  • Built-In Power fail detect (PFD), Programmable Supply Monitors and two Independent Watchdog
  • Non-maskable Interrupt Controller (NMIC)
  • Crystal or ceramic resonator oscillators: 3 to 20 MHz main oscillator with failure detection
  • RTC with Gregorian calendar and UTC mode, waveform generation in low-power modes
  • 32-bit low-power Real-time Timer (RTT)
  • High-precision 4/8/10/12 MHz factory-trimmed internal RC oscillator
  • 32.768 kHz crystal oscillator input or embedded 32 kHz (typical) RC oscillator as source of low-power mode device clock (SCLK)
  • One PLL for system clock, one PLL for peripherals
  • One dual-port 32-channel central DMA Controller (XDMAC)
    Peripherals
  • 32-bit Timer Counters (TC) with Capture, Waveform, Compare and PWM modes, Quadrature decoder logic and 2-bit Gray Up/Down Counter for stepper motor.
  • 16-bit PWMs with complementary outputs, Dead Time Generator and several fault inputs per PWM for motor control, two external triggers to manage Power Factor Correction(PFC), DC-DC and lighting control
  • FLEXCOMs, each supporting USART/UART, SPI and TWI/I²C
  • S
  • CAN FD Controller compliant with CAN Protocol Version 2.0 Part A, B and CANFD Specification
  • SpaceWire interface with two SpaceWire ports with Integrated RMAP support and embedded SpaceWire router
  • One 1553 interface with redundant links compliant to MIL-STD-1553B standard
  • One 16-channels 12-bit 1 Msps-per-channel Analog-to-Digital Controller (ADC)
  • One 2-channels 12-bit 1 Msps-per-channel Digital-to-Analog Controller (DAC)
    Voltage
  • 1.65V - 1.95V for Core and PLL
  • 3V - 3.6V for IOs
    Radiation Performances
  • No Single Event Latch-up Below an LET Threshold of 78 MeV.cm2 /mg @125°C
  • Total Ionizing Dose of 100 krad(Si)
  • Total Ionizing Dose of 20 krad(Si) on the embedded NVM - TBC
    Packages
  • CQFP164, 164-lead CQFP, 28.7 x 28.7mm, pitch 0.5 mm
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