PM50100 | Microchip Technology

PM50100

Status: In Production
Switchtec PFX 100xG5 Fanout PCIe® Switch

Overview

  • Lanes:100
  • Ports:52
  • NTBs:48
  • Hot Plug Controllers:52
  • Power Dissipation:0
  • Bandwidth:0
  • Product Name1:PFX 100xG5
  • Generation:Gen 5
Read more
  • High-reliability PCIe: robust error containment, hot- and surprise-plug controllers per port, end-to-end data integrity protection, ECC protection on RAMs
  • Comprehensive diagnostics and debugging: PCIe generator and analyzer, per-port performance and error counters, multiple loopback modes and real-time eye capture
  • Significant power, cost and board space savings with support for 52 ports and 26 virtual switch partitions and flexible *x1, x2, x4, x8, and x16 port bifurcation with no restrictions on configuring ports as either upstream or downstream, or on mapping ports to NTBs
  • Secure system solution with boot image authentication
  • DMA Controller
    • High-performance, ultra-low latency cut-through DMA engine
    • Up to 64 DMA channels
      Error Containment
    • Advanced Error Reporting (AER) on all ports
    • Downstream Port Containment (DPC) on all downstream ports
    • Completion Timeout Synthesis (CTS) to prevent an error state in an upstream host due to incomplete non-posted transactions
    • Hot- and surprise-plug controllers per port
    • GPIOs configurable for different cable/connector standards
      PCIe Interfaces
    • Passive, managed and optical cables
    • SFF-8644, SFF-8643, SFF-8639, OCuLink and other connectors
    • SHPC-enabled slot and edge connectors
      Diagnostics and Debug
    • Transaction Layer Packet (TLP) generator for testing and debugging of links and error handling
    • Real-time eye capture
    • External loopback capability
    • Errors, statistics, performance and TLP latency counters
      Peripheral I/O Interfaces
    • 12 Two-Wire Interfaces (TWIs) with SMBus support
    • SFF-8485-compliant SGPIO ports
    • Up to 103 parallel GPIO pins
    • Up to 4 UARTs
    • Up to 2 100/GE MAC port (RMII/GMII)
    • JTAG and EJTAG interface
      High-Speed I/O
    • PCIe Gen 5 32 GT/s
    • Supports PCIe-compliant link training and manual PHY configuration
      Power Management
    • Active State Power Management (ASPM)
    • Software-controlled power management
      ChipLink Diagnostic Tools
    • Extensive debug, diagnostics, configuration and analysis tools with an intuitive GUI
    • Access to configuration data, management capabilities and signal integrity analysis tools (such as real-time eye capture)
    • Connects to device over in-band PCIe or sideband signals (UART, TWI and EJTAG)
      Evaluation Kit
    • The PM52100-KIT Switchtec Gen 5 PCIe Switch Evaluation Kit is a device evaluation environment that supports multiple interfaces.

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