PIC18F56Q83 | Microchip Technology

Overview

  • Program Memory Size (KB):64
  • RAM:8192
  • Data EEPROM (bytes):1024
  • Pin Count:48
  • Operation Voltage Max.(V):5.5
  • Operation Voltage Min.(V):1.8
  • ADC Resolution Max:12
  • ADC Channels:43
  • Zero Cross Detect:True
  • Number of Comparators:2
  • SPI:2
  • I2C:1
  • Stand alone PWM:4
  • Low Power:Yes
  • Numerically Controlled Oscillator (NCO):1
  • Data Signal Modulator (DSM):1
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    Functional Safety
  • IEC 60730 Class B library (UL certified)
  • ISO 26262 FMEDA (ASIL B Ready certified by SGS TÜV)
  • ISO 26262 Safety Manual (ASIL B Ready certified by SGS TÜV)
  • ISO 26262 software diagnostics (certification pending)
  • IEC 61508 FMEDA
  • IEC 61508 Safety Manual (ultimo 2021)
  • MPLAB XC8 Functional Safety Pro compiler
    CAN module:
  • Functional in CAN FD or CAN 2.0B modes
    Eight Direct Memory Access (DMA) Controllers:
  • Data transfers capabilities
  • User programmable source and destination sizes
  • Hardware and software triggered data transfers
    Vectored Interrupt Capability:
  • Selectable high/low priority
  • Fixed interrupt latency of three instruction cycles
  • Programmable vector table base address
  • Backwards compatible with previous interrupt capabilities
    Analog-to-Digital Converter with Computation and Context Switching (ADC):
  • Automated math functions on input signals:
  • Averaging, filter calculations, oversampling and threshold comparison
  • 4 Separate Contexts (settings and results) saved and accessible separately
  • Contexts can be accessed through firmware or DMA
    Five internal analog channels
  • Hardware Capacitive Voltage Divider (CVD) Support:
  • Automates touch sampling and reduces software size and CPU usage when touch or proximity
    Universal Timer (UTMR)
  • Two Customizable 16-bit Timers​ - Combine to create larger bit timer
    8-Bit Digital-to-Analog Converter (DAC):
    Two Comparators (CMP):
  • Four 16-Bit Pulse-Width Modulators (PWM):
    Data Signal Modulator (DSM):
    Programmable CRC with Memory Scan:
  • Reliable data/program memory monitoring for Fail-Safe operation (e.g., Class B)
  • Calculate 32-bit CRC over any portion of Program Flash Memory
    Communication:
    Five UART modules:
  • LIN master and slave, DMX mode, DALI gear and device protocols
  • SPI / I2C
    Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)
    Idle: CPU Halted While Peripherals Operate
    Sleep: Lowest Power Consumption
    Peripheral Module Disable (PMD):
  • Ability to selectively disable hardware module to minimize active power consumption of unused peripherals
    JTAG: Supports boundary scan
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pic18f56q83
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