Title |
Title
Error Detection and Correction on SmartFusion2 Devices using DDR Memory - Libero SoC v11.8 Demo Guide
|
---|---|
Name |
Name
DG0618
|
Date |
Date
03/23/2017
|
Application Categories |
Application Categories
General Purpose
|
Description |
Description
This document describes the EDAC capabilities of the SoC FPGA, which are used in applications with memories connected through the microcontroller subsystem (MSS) DDR (MDDR).
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Title | Title | Download | Date | Size |
---|---|---|---|---|
m2s_dg0618_liberov11p8_df.rar 114.6 MB 11/19/2021 | m2s_dg0618_liberov11p8_df.rar | Download | 11/19/2021 | 114.6 MB |
Title | Product | Title |
---|---|---|
M2S050
Low Density Devices with hard ARM Cortex-M3
|
M2S050 | Low Density Devices with hard ARM Cortex-M3 |
M2S060
Low Density Devices with hard ARM Cortex-M3
|
M2S060 | Low Density Devices with hard ARM Cortex-M3 |
M2S025
Low Density Devices with hard ARM Cortex-M3
|
M2S025 | Low Density Devices with hard ARM Cortex-M3 |
M2S005
Low Density Devices with hard Cortex-M3
|
M2S005 | Low Density Devices with hard Cortex-M3 |
M2S150
Low Density Devices with hard ARM Cortex-M3
|
M2S150 | Low Density Devices with hard ARM Cortex-M3 |
M2S010
Low Density Devices with hard ARM Cortex-M3
|
M2S010 | Low Density Devices with hard ARM Cortex-M3 |
M2S090
Low Density Devices with hard ARM Cortex-M3
|
M2S090 | Low Density Devices with hard ARM Cortex-M3 |