Amp It Up: Designing with Instrumentation Amplifiers

Instrumentation Amplifiers

You’ve probably heard of an Instrumentation Amplifier (INA), but you may not know the best architecture for your particular needs. There are two common approaches, so read on to quickly determine which one you should use.

An INA can accurately extract a small signal in the presence of a large common mode, making them ideal for sensor amplification. An INA has two inputs – inverting and non-inverting – and works to amplify signals that are different to each input (high differential gain) and reject signals that are common to both (high common-mode rejection). Figure 1 demonstrates how an INA is used in weight, temperature, pressure and other applications.

In each application, an INA amplifies a small output voltage signal from a sensor. The signal is then converted into a digital form, using an Analog to Digital Converter (ADC), before input to a Microcontroller Unit (MCU) for processing.

The three-amplifier configuration and indirect current feedback are the most common INA architectures. This post describes the system-level trade-offs associated with each type.

Three Amplifier Configuration

As figure 2 illustrates, this INA design uses three instances of the same operational amplifier (op amp) packaged in a single integrated circuit.

The input stage uses two op amps configured as inverting buffers. The internal resistors are closely matched, with tolerances that are only possible with a trimmed resistor semiconductor process, to provide a very high Common-Mode Rejection Ratio (CMRR). They also provide high impedance to minimize loading of the sensor output. The gain-setting resistor (R_G) can be chosen to select a gain value within the operating region of the device (typically from 1 to 1,000).

The output stage is a traditional difference amplifier arrangement. The ratio of the internal resistors, R₂/R₁, sets the gain of the internal difference amplifier, which is usually 1 for most INAs. The balanced signal paths from the input to the output provide an excellent CMRR.

Some advantages of this three op amp design are that it is simple to implement, has a small footprint and uses few components, helping to reduce overall system cost. It is also compatible with a single source supply (using the V_REF pin).

However, a three op amp configuration also has limitations. While it provides a high CMRR at DC (through close matching of the on-chip resistors), the feedback architecture can substantially degrade AC CMRR. Additionally, since parasitic capacitances cannot be matched exactly, the CMRR begins to reduce at higher frequencies. The common-mode voltage input range is also limited (to prevent saturation of internal nodes). The V_REF pin also needs a buffer amplifier to provide optimal performance. Finally, the temperature coefficients of the external and internal gain resistors are not matched, which also contributes to a decline in the CMRR. The gain for the three op amp INA configuration is expressed in the formula below:

Indirect Current Feedback

In this design, the Indirect Current Feedback (ICF) INA uses a novel voltage-to-current conversion approach, (see figure 3 below). 

The ICF includes two matched transconductance amplifiers: _M1 and G_M2, and a high-gain transimpedance amplifier (A3). The design is insensitive to resistor matching, so internally trimmed resistors aren’t required, which reduces manufacturing costs.

Another advantage to this design is that the external resistors do not need to match on-chip resistors. However, the temperature coefficients of the R_F and R_G external resistors must be matched as closely as possible to minimize gain drift. Amplifier G_M1 rejects common-mode signals to provide a high CMRR at DC. Unlike the three op amp configuration, the AC CMRR does not decrease significantly with frequency.

With ICF, the output voltage swing is not coupled to the input common-mode voltage, meaning it has a wider operating voltage range than the three-op amp architecture. The second stage (consisting of G_M2 and A3) amplifies the differential input on V_FG and V_REF and provides extra rejection of common-mode noise. Single supply operation is possible by applying a bias voltage to the V_REF pin. The gain of this design is expressed as:

Three Op Amp and ICF Circuits in Design

Both design configurations are commonly used to amplify low amplitude sensor signals in noisy environments. The choice of which one to use depends on your application.

• One benefit of an integrated three op amp architecture is a high DC CMRR. It also provides a balanced, high impedance input using only one gain resistor. However, it has a limited common-mode input voltage range. Also, it is difficult to match the temperature coefficients of the internal and external resistors, resulting in gain drift. The impedance at the V_REF pin can also negatively impact the CMRR, unless an extra buffer amplifier is used.
• The ICF approach also provides a high CMRR even at high frequencies. This configuration has a wider common-mode input voltage range and does not need on-chip trimmed resistors. This reduces the temperature-coefficient gain drift and lowers the overall system cost.

For more information, visit our Instrumentation Amplifiers page to learn how our family of instrumentation amplifiers can be used in your sensor amplification and other data acquisition applications.