The KSZ8851 is a single-port controller chip with a SPI or 8-/16-/32-bit non-PCI CPU interface.

Available in 32-/48-/128-pin packages, the KSZ8851 is for applications requiring cost-effective, high-throughput Ethernet connectivity in traditional embedded systems with MCUs or MPUs.

• KSZ8851SNL/SNLI: SPI interface, 32-pin package

• KSZ8851-16MLL: 8-/16-bit host bus, 48-pin package

• KSZ8851-16/32MQL: 16-/32-bit host bus, 48-pin package (-16MQL) or 128-pin package (-32MQL) 

The KSZ8851 is a single chip, mixed analog/digital device offering Wake-on-LAN technology for effectively addressing Fast Ethernet applications. It consists of a Fast Ethernet MAC controller, an 8-bit or 16-bit generic host processor interface and incorporates a unique dynamic memory pointer with 4-byte buffer boundary and a fully utilizable 18KB for both TX (allocated 6KB) and RX (allocated 12KB) directions in host buffer interface. The KSZ8851 is designed to be compliant with the appropriate IEEE 802.3u standards.

An industrial temperature-grade version of the KSZ8851 is also available. Physical signal transmission and reception are enhanced through the use of analog circuitry, making the design more efficient and allowing for lower-power consumption.

The KSZ8851 is designed using a low-power CMOS process that features a single 3.3V power supply with options for 1.8V, 2.5V or 3.3V VDD I/O. The device includes an extensive feature set that offers management information base (MIB) counters and CPU control/data interfaces with single shared data bus timing.

The KSZ8851 includes unique cable diagnostics feature called LinkMD^®. This feature determines the length of the cabling plant and also ascertains if there is an open or short condition in the cable. Accompanying software enables the cable length and cable conditions to be conveniently displayed. In addition, the KSZ8851 supports Hewlett Packard (HP) Auto-MDIX thereby eliminating the need to differentiate between straight or crossover cables in applications.

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